1. Field of the Invention
The present invention relates to a constant current circuit that supplies a stable output current.
2. Description of Related Art
A band-gap reference circuit is known as a constant current circuit that is widely used in a semiconductor integrated circuit. The band-gap reference circuit is independent of power supply voltage fluctuation or process fluctuation of MOS transistors.
The technique related to the band-gap reference circuit is disclosed in Japanese Unexamined Patent Application Publication No. 8-63245 (Koyabe). FIG. 6 shows the technique disclosed in Koyabe. The technique taught by Koyabe includes P-channel MOS transistors (PMOS) P51 to P53, N-channel MOS transistors (NMOS) N51 and N52, a resistor R51, and diodes D51 and D52. The PMOS P51, the NMOS N51 and the diode D51 are connected in series between a power supply and a ground. The PMOS P52, the NMOS N52, the resistor R51 and the diode D52 are also connected in series between the power supply and the ground. The PMOS P51 and the PMOS P52 form a first current mirror. The NMOS N51 and the NMOS N52 form a second current mirror. The first current mirror and the second current mirror form a loop. The area ratio of the diode D51 and the diode D52 is 1:N. The NMOS N51, the NMOS N52, the PMOS P51 and the PMOS P52 have the same transistor size, and they operate in a saturation region. The terminal “a” is a power supply terminal, “b” is an output terminal, and “c” is a ground terminal.
Because the NMOS N51 and the NMOS N52 form a current mirror, gate-source voltages Vgs of N51 and N52 are equal, so that a voltage VA at a point A and a voltage VB at a point B are equal. Therefore, a voltage drop at the resistor R51 is determined by a difference between the diodes D51 and D52. Thus, a current I52 is determined by a difference between the voltage VA at the point A and a voltage VC at a point C, which is VA−VC. The current I52 is independent of the characteristics of MOS transistors and a power supply voltage because I52=I51=(kT/q)log(N)/R51 where k is Boltzmann constant, q is elementary charge, and T is temperature.
However, the current I52 varies with process fluctuation in resistance of the resistor R51. As the current I52 varies, an output current I53 which forms a current mirror with the current I52 also varies by process fluctuation in resistance of the resistor R51. The technique to overcome this drawback is disclosed in Japanese Unexamined Patent Application Publication No. 4-170609 (Kameyama). FIG. 7 shows the technique disclosed in Kameyama. The technique taught by Kameyama uses an NMOS N53 instead of the diodes D51 and D52 used in Koyabe and further includes a feedback unit 60 having a PMOS P53, an NMOS N54 and an NMOS N55. The terminal “a” is a power supply terminal, “b” is an output terminal, and “c” is a ground terminal.
As in Koyabe, the current I52 is determined by a voltage applied to the resistor R51. If the current I52 increases, the current I53 increases accordingly. The voltage at the NMOS N54 is lower than the voltage at the point A, and a voltage difference between the point A and the NMOS N54 is fed back to the NMOS N53. As a result, the voltage at the point A decreases. The voltages of the point A and the point B are equal because of a current mirror, and therefore the voltage at the point B decreases as the voltage at the point A decreases. Consequently, the current I52 is suppressed, and the output current I54 is thereby also suppressed. In this manner, Kameyama uses the feedback unit 60 to control the current fluctuation which occurs due to variations of a gate length Lg, a gate width Wg and a threshold Vt of each MOS transistor and a resistance.
However, although the technique disclosed in Kameyama can supply a stable output current for power supply voltage fluctuation and process fluctuation of each MOS transistor, it cannot supply a stable current for temperature fluctuation because it does not use a temperature compensating circuit or the like which uses a diode and a resistor as in Koyabe.